Design-Reuse

Averant Announces AMBA AXI Protocol Checker

Alameda, Calif. – June 2, 2005 – Averant Inc., a leading provider of advanced design verification technology for RTL designers, today announced the release of the SolidPC™ protocol checker for ...
Design-Reuse

Synopsys Enhances DesignWare Synthesizable IP for AMBA 2 and AMBA 3 AXI Protocols

MOUNTAIN VIEW, Calif. -- April 25, 2007-- Synopsys, Inc. (Nasdaq: SNPS - News), a world leader in semiconductor design software, today announced the 2007.04a release of DesignWare® synthesizable ...
EDN

Building a better memory controller: architectural performance exploration of an AXI memory controller

Communicationbetween processors and memories is often a major bottleneck, making the designof the memory controller a critical task in determining overall system-levelperformance. The memory ...
Semiconductor Engineering

Moving From AMBA ACE to CHI For Coherency

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
EDN

Network-on-chip solution to support AMBA 3 AXI protocol

SAN FRANCISCO — French network-on-chip (NoC) solution startup Arteris SA plans Monday (Feb. 27) to release the latest version of its Arteris NoC Solution, including support for the AMBA 3 AXI protocol ...
Electronic Design

Formal Techniques for Protocol Verification: A Case Study On Verifying the ARM ACE Protocol

More processors on SoCs means more sophisticated cache control. This article describes formal techniques for verifying cache coherency for the ARM AMBA AXI Coherency Extensions (ACE) protocol. Fig 1.
Semiconductor Engineering

Mixing Interface Protocols

Continuous and pervasive connectivity requires devices to support multiple interface protocols, but that is creating problems at multiple levels because each protocol is based on a different set of ...