Electronic Design

OMAP Processor Integrates MediaLB Interface

The newest processor in Texas Instruments' OMAP family integrates Standard Microsystems Corporation's (SMSC) MediaLB communication bus for interfacing to media-oriented system transport (MOST) ...
EDN

LA-1: Standardizing the Look-Aside Processor Interface

The offload of tasks for data plane packet-processing elements, such as network processors, to co-processor solutions, such as classification engines, ternary CAMs (TCAMs), IP co-processors, and more ...
Semiconductor Engineering

Central Processing Unit (CPU)

The central processing unit (CPU) is either a dedicated integrated circuit (IC) or intellectual property (IP) core on an IC that processes logic and math. A CPU can handle high-level provisioning of ...
Design-Reuse

RMI Corporation Launches Industry's First Quad-Core Multi-Threaded Processor With Integrated Serial RapidIO Interface and IEEE1588 Controller for Wireless Base-Station Markets

New XLS Processor Offerings Enhance Baseband and Network Interface Processing Performance While Providing Pin-Compatible Upgradeability to Existing XLS Processor Families BARCELONA, Spain -- February ...
EDN

LA-1: Examining the Look-Aside Processor Interface

As line rates in core networks increase from OC-48 to OC-192, core routers will need to process hundreds of millions of packets per second. This creates the need for packet processing elements, such ...